Circuit interconnects play a critical role in modern day electronic circuits. At the same time, the increasing switching speeds is making the design of these interconnects more complex as it is no longer possible to model using lumped elements. The interconnects have to be modeled as transmission lines. Transmission line behavior results in reflections in case of impedance mismatch between the Line Driver and the transmission line or the transmission line and the load. These reflections are unwanted as they add noise to the system and compromise the detectability of the signals.
Hence, while designing the output driver, special care has to be taken to provide the correct output impedance. The output impedance has to be such that the reflections on the transmission line are minimized.
There have been a number of attempts in the prior art to design a driver with a DC impedance in a narrow range of values. These attempts have focused on controlling the impedance in the deep linear and the deep saturation regions of operation. Even if the impedance is controlled quite accurately in these two regions, the impedance in the intermediate region is less controlled. This limitation leads to the problem of maintaining the impedance in the desired range of values in the intermediate region of operation.
FIG. 1 and FIG. 2 show the V-I characteristic for a typical output driver. As shown, the V-I characteristic of FIG. 1 can be divided into two regions as shown in FIG. 2. The first region is known as the Linear Region while the second region is called the Saturation Region.
FIG. 3 shows a circuit implementation known in the art. There are 2 operating conditions—one in which transistors N1 and N2 are in the linear region and the other in which the transistors N1 and N2 enter saturation. As the PAD voltage is decreased, the transistors move from the saturation region to the linear region. If the two transistors are designed such that the current flows in their boundaries, in the linear region, then the current saturates at high pad voltages and drops below the lower limit on the slow corners. The addition of transistor N3 solves this problem. As the gate of this transistor is connected to the pad, the transistor can turn ON only after the pad voltage rises above the threshold voltage of this transistor. N3 sinks significant current only when the Vgs for this transistor increases well above the threshold voltage. The pad voltage corresponding to this condition is dependent on the source voltage of N3 which in turn is dependent on the pull down strength of N2. In order to turn-on N3 at a lower PAD voltage, it is necessary to increase the strength of N2. However, making N2 strong also increases the current sinking by N2 and N1 in the linear region. This action disturbs the DC impedance in the linear region. Hence this approach does not provide a uniform DC impedance across the V-I characteristics.
FIGS. 4 and 5 show two other known designs for the output buffer using two diode connected transistors connected in parallel with N1. FIG. 4 shows known design for the output buffer wherein transistor 60 corresponds to N1 and transistor 62 corresponds to N2. In this implementation N3 is replaced by two diode connected transistors 50 and 52 connected in parallel with 60. This approach also suffers from the same problem of not controlling the Impedance in the transition region.
FIG. 6 shows the operating characteristic of a DDR buffer indicating the specified operating limits.
FIG. 7 shows the variation in operating characteristic for a DDR output buffer achieved using conventional designs. Tracings “A” define the specification boundaries. Tracing “B” shows the worst case result for the slower side and tracing “C” shows the worst case achieved on the faster side. As can be seen the specification boundaries are being violated in both cases.
It is therefore desirable to provide a mechanism that controls the DC impedance in all three regions of operation. Such an arrangement will lead to a better control over the band in which the impedance varies and hence provide better matching between the driver and the transmission line.